I watch the toolmakers, and Aehr Test Systems – whose burn‑in systems screen dies before they enter a multi‑die package – saw bookings surge 6× quarter‑over‑quarter to $37.2 million and an effective backlog hit a company record of $50.9 million, with advanced‑packaging test driving its semiconductor segment from 3 % to 25 % of revenue. Onto Innovation, whose biggest customer is TSMC, guided advanced‑packaging revenue growth to 50 %, and both signals point to the packaging constraint being invested against hard, with the honest caveat that capacity being built eventually arrives.
I'm CoWoS - TSMC's advanced packaging, where leading-edge logic dies get married to their memory stacks. Every serious AI accelerator crosses my bench: GPUs, custom chips, all of them. TSMC calls my capacity 'very tight' and expects it to stay that way through at least 2027. My customers pre-pay billions to hold a place in line, and contractually it's all classified 'ordinary course of business.' The most fought-over capacity on Earth, filed under routine.
The toolmakers signal before I fill. Aehr Test Systems bookings jumped 6x to $37.2M, backlog a record $50.9M, advanced-packaging test now 25% of its semiconductor revenue from 3%. Onto Innovation, 21% tied to TSMC, guides 50% advanced-packaging growth. Their orders precede my wafer starts — the constraint is being invested against, though capacity built eventually arrives.
Every serious AI accelerator crosses my bench — I'm the primary packaging technology, and the constraint is current, not projected. TSMC described advanced-packaging capacity as "very tight" on its early-2026 call, sees it persisting through at least 2027 in step with wafer tightness, and is accelerating construction and equipment schedules. The annual filing shows packaging, testing, and services at NT$537B across seven advanced backend fabs, with NT$190B in customer advance payments, all filed as ordinary-course contracts where no single agreement reaches materiality.
But at its March 2026 developer conference, NVIDIA's CEO named the partner freely: "We invented the process technology with TSMC. We're the only one in production with it today," describing our co-developed optical packaging. Sixteen pages of earnings call later, the same dependence goes unnamed. The pattern is venue-specific — keynotes name the partnership; earnings calls preserve supply-chain silence. I read the filings; silence in one room does not mean the dependence isn't there.
Aehr Test Systems – whose burn‑in systems screen dies before they enter a multi‑die package – saw bookings surge 6x quarter‑over‑quarter to $37.2 million and an effective backlog hit a company record of $50.9 million, with advanced‑packaging test driving its semiconductor segment from 3% to 25% of revenue. I watch the toolmakers, knowing that their testing precedes the dies that eventually line up on my bench.
I watch Broadcom’s annual filing note that roughly 95 % of its contract‑manufactured wafers run through me, and its executives say supply of leading‑edge wafers, memory and substrates is ‘fully secured’ for 2026‑2028, ‘probably the first one to secure that up to 2028 or beyond.’ NVIDIA disclosed a $145 billion supply commitment across inventory, purchase commitments and pre‑payments, with its CEO saying they split chips ‘only when we absolutely have no choice,’ pushing ever‑larger dies onto my bench, and nearly 9 GW of the current generation already deployed.
A disclosure quirk worth savoring: sixteen pages of an NVIDIA earnings call discuss a product generation whose production depends directly on my bench without saying my name. But at a March 2026 developer conference, the CEO named the partner freely: "We invented the process technology with TSMC. We're the only one in production with it today," describing our co-developed optical packaging. The pattern is venue-specific — keynotes name the partnership; earnings calls preserve supply-chain silence. For readers of filings, silence in one venue does not mean the dependence isn't there.
I'm the primary packaging for AI accelerators, and the bottleneck is now, not later. TSMC called my capacity "very tight" on its early-2026 call and expects constraints through at least 2027 alongside wafer tightness, pulling construction and equipment schedules forward. Packaging, testing, and services across seven advanced backend fabs: NT$537B revenue, NT$190B in customer advance payments — all ordinary-course contracts, no single agreement material.
Broadcom's filing shows ~95% of its contract wafers flow through me, with supply 'fully secured' through 2028 — 'probably the first one to secure that up to 2028 or beyond.' NVIDIA's $145B in commitments stretches further out than usual; its CEO says they split chips 'only when we absolutely have no choice,' pushing maximum dies onto my bench. Marvell's Taiwan-shipped revenue jumped from $162M to $1.66B in two years, its operations chief naming advanced packaging a binding constraint. Three filings, one queue.
They name me on stage but not in the filing room. NVIDIA's CEO told a March 2026 developer conference, "We invented the process technology with TSMC. We're the only one in production with it today," describing our co-developed optical packaging. Sixteen pages of earnings call later, the same dependence goes unnamed. The relationship exists; the venue decides whether it's spoken.
Watch the toolmakers to see me coming. Aehr Test Systems bookings surged 6x quarter-over-quarter to $37.2 million, backlog a company record $50.9 million, with advanced-packaging test driving its semiconductor segment from 3% to 25% of revenue. Onto Innovation, largest customer TSMC at 21% of revenue, guided advanced-packaging revenue growth to 50%. Tool orders precede wafer starts; both signals point to the packaging constraint being invested against hard — the honest caveat being that capacity being built eventually arrives.