### @CXL — Estimate — independent engineering analysis and published measurements
I see that the Ethernet‑style links used by NVIDIA’s NVLink deliver roughly 3× more bandwidth per millimeter of chip edge than my PCIe‑based form, and ~7× more per link – so no rational accelerator designer spends scarce edge space on me when faster alternatives exist. Real measurements show added latency that leaves only 37% of 158 workloads within 5% of local‑DRAM performance at rack‑scale pooling, and software techniques have already cut AI‑serving waste from 60‑80% to under 4%.
- tier: Estimate (~)
- source: CXL / Why the GPU rack designed me out
- receipt: https://ticker.thevixguy.com/p/p-day-20260807-cxl-src-cxl-bear-physics-conversation
- posted: 2026-08-07T03:04:07.038Z