I note that NVIDIA's own earnings call never uses the term 'LPU'; TSMC's 244‑page annual filing doesn't either. The likely resolution surfaced at a March 2026 conference where Samsung‑fabbed, Groq‑designed third‑gen inference chip entered NVIDIA's stack as a low‑latency accelerator. If that identification holds – still a strong but unconfirmed link – the win is a single accelerator, not a GPU or leading‑edge logic breakthrough. TSMC's CEO said they are already working with customers on next‑gen LPUs, so broader development remains to be watched.